/* all defines which are hardware related */
#ifndef _ENV_DEV_H_
#define _ENV_DEV_H_

//#include <avr/pgmspace.h>  // exeption - need to define the static list

#define IN_PROGRESS 0x7F
#define FINISHED 	0x00
#define UNDEFINED   0x00

#define FALSE (0!=0)
#define TRUE  (0==0)



//TEMP define
/*
#define ILED00 IOPORT0 ^= (1<<0)
#define ILED01 IOPORT0 ^= (1<<1)
#define ILED02 IOPORT0 ^= (1<<2)
#define ILED03 IOPORT0 ^= (1<<3)
#define ILED04 IOPORT0 ^= (1<<4)
#define ILED05 IOPORT0 ^= (1<<5)
#define ILED06 IOPORT0 ^= (1<<6)
#define ILED07 IOPORT0 ^= (1<<7)

#define ILED10 IOPORT1 ^= (1<<0)
#define ILED11 IOPORT1 ^= (1<<1)
#define ILED12 IOPORT1 ^= (1<<2)
#define ILED13 IOPORT1 ^= (1<<3)
#define ILED14 IOPORT1 ^= (1<<4)
#define ILED15 IOPORT1 ^= (1<<5)
#define ILED16 IOPORT1 ^= (1<<6)
#define ILED17 IOPORT1 ^= (1<<7)

#define ILED20 IOPORT2 ^= (1<<0)
#define ILED21 IOPORT2 ^= (1<<1)
#define ILED22 IOPORT2 ^= (1<<2)
#define ILED23 IOPORT2 ^= (1<<3)
#define ILED24 IOPORT2 ^= (1<<4)
#define ILED25 IOPORT2 ^= (1<<5)
#define ILED26 IOPORT2 ^= (1<<6)
#define ILED27 IOPORT2 ^= (1<<7)
*/







// Can message IDs

#define TYPE_ROLLO 0x01   //einzelne
#define TYPE_ROLLO_MULTI 0x02 // mehrer
#define TYPE_SET_DATE 0x03
#define TYPE_SET_TIME 0x04


#define TARGET_TIME1 1 // in ms!!
#define TARGET_TIME3 10 // in ms!!

#define IRQ_PER_SEC_T1 (1000/TARGET_TIME1)  // do not change
#define IRQ_PER_SEC_T3 (1000/TARGET_TIME3) // do not change


#define VOLTAGE 5 //5V

// 8 Bytes (64 Ports)

#define MAX_OUT 24 //  anzahl der zu schaltenen ausgaenge
#define MAX_PORT 3 // Anzahl in Bytes 24 / 8 !!


// new ports TODO
#define IOPORT0 PORTF //
#define IOPORT1 PORTA //
#define IOPORT2 PORTC //

/*
Port -> wannenleiste

PF0 -> 2
PF1 -> 1
PF2 -> 4
PF3 -> 3
PF4 -> 6
PF5 -> 5
PF6 -> 8
PF7 -> 7

PA0 -> 9
PA1 -> 10
PA2 -> 11
PA3 -> 12
PA4 -> 13
PA5 -> 14
PA6 -> 15
PA7 -> 16

PC0 -> 24
PC1 -> 23
PC2 -> 22
PC3 -> 21
PC4 -> 20
PC5 -> 19
PC6 -> 18
PC7 -> 17
*/

// PORTF only works with JTAG disable

extern uint8_t PROGMEM days[][3];
extern uint8_t PROGMEM months[][4];

//DCF77 defines
#define _PIN_DCF77  0xE5


// defines for mega 64
#if   _PIN_DCF77 == 0xD0
    #define PIN_DCF77 PIND0
	#define PORT_DCF77 PORTD
	#define DCF77_CONTROL EICRA
	#define DCF77_INT INT0_vect
	#define DCF77_INT_NO INT0
	#define DCF77_FALLING_EDGE 0x02
	#define DCF77_RISING_EDGE  0x03
    #define DCF77_CONTROL_MASK 0x03
#elif _PIN_DCF77 == 0xD1
    #define PIN_DCF77 PIND1
    #define PORT_DCF77 PORTD
	#define DCF77_CONTROL EICRA
	#define DCF77_INT INT1_vect
	#define DCF77_INT_NO INT1
	#define DCF77_FALLING_EDGE 0x04
	#define DCF77_RISING_EDGE  0x0C
    #define DCF77_CONTROL_MASK 0x0C
#elif _PIN_DCF77 == 0xD2
    #define PIN_DCF77 PIND2
    #define PORT_DCF77 PORTd
	#define DCF77_CONTROL EICRA
	#define DCF77_INT INT2_vect
	#define DCF77_INT_NO INT2
	#define DCF77_FALLING_EDGE 0x20
	#define DCF77_RISING_EDGE  0x30
    #define DCF77_CONTROL_MASK 0x30
#elif _PIN_DCF77 == 0xD3
    #define PIN_DCF77 PIND3
    #define PORT_DCF77 PORTD
	#define DCF77_CONTROL EICRA
	#define DCF77_INT INT3_vect
	#define DCF77_INT_NO INT3
	#define DCF77_FALLING_EDGE 0x40
	#define DCF77_RISING_EDGE  0xC0
    #define DCF77_CONTROL_MASK 0xC0
#elif _PIN_DCF77 == 0xE4
    #define PIN_DCF77 PINE4
    #define PORT_DCF77 PORTE
	#define DCF77_CONTROL EICRB
	#define DCF77_INT INT4_vect
	#define DCF77_INT_NO INT4
	#define DCF77_FALLING_EDGE 0x02
	#define DCF77_RISING_EDGE  0x03
    #define DCF77_CONTROL_MASK 0x03
#elif _PIN_DCF77 == 0xE5
    #define PIN_DCF77 PINE5
    #define PORT_DCF77 PORTE
	#define DCF77_CONTROL EICRB
	#define DCF77_INT INT5_vect
	#define DCF77_INT_NO INT5
	#define DCF77_FALLING_EDGE 0x04
	#define DCF77_RISING_EDGE  0x0C
    #define DCF77_CONTROL_MASK 0x0C
#elif _PIN_DCF77 == 0xE6
    #define PIN_DCF77 PINE6
    #define PORT_DCF77 PORTE
	#define DCF77_CONTROL EICRB
	#define DCF77_INT INT6_vect
	#define DCF77_INT_NO INT6
	#define DCF77_FALLING_EDGE 0x20
	#define DCF77_RISING_EDGE  0x30
    #define DCF77_CONTROL_MASK 0x30
#elif _PIN_DCF77 == 0xE7    
	#define PIN_DCF77 PINE7
    #define PORT_DCF77 PORTE
	#define DCF77_CONTROL EICRB
	#define DCF77_INT INT7_vect
	#define DCF77_INT_NO INT7
	#define DCF77_FALLING_EDGE 0x40
	#define DCF77_RISING_EDGE  0xC0
    #define DCF77_CONTROL_MASK 0xC0
#else
#error "no irq defined for dcf77"
#endif


//taster defines
#define _PIN_TASTER  0xE4  // try to use other ability ?
#define _PIN_TRIGHT  0xE6
#define _PIN_TLEFT   0xE7


// heart beat
#define PIN_LED1  PINB4  // ok
#define PORT_LED1  PORTB // ok


// special io expander signals
#define PORT_RCK  PORTC // latch // ok
#define PIN_RCK  PINC0 // latch  low -> high  // ok


//#define PIN_OE   PINB4 // output enable for io expander - low active !

// special lcd signals

#define PORT_RS   PORTC // ok
#define PORT_CSB  PORTC // ok

#define PIN_RS   PINC2 // lcd cmd/data switch // ok
#define PIN_CSB  PINC4 // lcd chipselect  // ok


//uart defines

#define UDR UDR0

#define BAUDRATE 9600L

//timer defines

//#define WISHED_TIME1 ((float) (1/100)) // seconds - set irq time in seconds eg 0.1 or 10 sec - prescaler is calc automatic
//#define WISHED_TIME3 ((float) (1/10)) // second - set irq time in seconds eg 0.1 or 10 sec - prescaler is calc automatic

//utils
#define DDR(x) (*(&x - 1))      /* address of data direction register of port x */
#define INP(x) (*(&x - 2))      /* address of data direction register of port x */
#define FALLING_EDGE 0x02
#define RISING_EDGE	 0x03



enum port_outputs
{
BASE_LIV_UP,									  
BASE_LIV_DOWN,
EG_KITCH_RIGHT_UP,
EG_KITCH_RIGHT_DOWN,
EG_KITCH_LEFT_UP,
EG_KITCH_LEFT_DOWN,
EG_LIV_R1_UP,
EG_LIV_R1_DOWN,
EG_LIV_M2_UP,
EG_LIV_M2_DOWN,
EG_LIV_M3_UP,
EG_LIV_M3_DOWN,
EG_LIV_M4_UP,
EG_LIV_M4_DOWN,
EG_LIV_L5_UP,
EG_LIV_L5_DOWN,
EG_LIV_A6_UP,
EG_LIV_A6_DOWN,
EG_SLEEP_RIGHT_UP,
EG_SLEEP_RIGHT_DOWN,
EG_SLEEP_LEFT_UP,
EG_SLEEP_LEFT_DOWN,
EG_BATH_UP,
EG_BATH_DOWN,
EG_STAIR_UP,
EG_STAIR_DOWN,
DG_KITCH_NORM_UP,		
DG_KITCH_NORM_DOWN,	
DG_KITCH_ROOF_UP,	
DG_KITCH_ROOF_DOWN,
DG_LIV_ROOF_UP,	
DG_LIV_ROOF_DOWN,
DG_SLEEP_NORM_UP,
DG_SLEEP_NORM_DOWN,
DG_SLEEP_ROOF_UP,  
DG_SLEEP_ROOF_DOWN,
DG_STAIR_ROOF_UP,
DG_STAIR_ROOF_DOWN,
DG_BATH_UP,
DG_BATH_DOWN,
LED,
NO_PORT=0xFF
};




#endif /* _ENV_DEV_ */
